1. Field of the Invention
The present invention relates to an image display device in which peripheral circuits can be integrated on a glass substrate and, more particularly, to an image display device suitable for high-precision display.
2. Description of the Prior Arts
Prior arts will be described hereinbelow with reference to FIGS. 6 to 9.
FIG. 6 is a block diagram of an image display device of a first prior art. Pixels 201 are provided in the shape of a matrix in a display area 200, and signal lines 200 and gate lines 203 are connected to the pixels 201. Although a number of pixels 201 are provided in the display area 200 in reality, only one pixel is shown in FIG. 6 for simplification of the drawing. The pixel 201 is constructed by a pixel switch 204 formed by an amorphous Si-TFT (Thin Film Transistor) and a liquid crystal element 205. The display area 200 is provided on a glass substrate 206. An end of the gate line 203 is connected to a shift register (S/R) 208 provided in a gate driver LSI 207 disposed in contact with the glass substrate 206. An end of the signal line 202 is connected to a buffer circuit 210 provided in a liquid crystal driver LSI 209 disposed in contact with the glass substrate 206. The buffer circuit 210 is sequentially connected to a digital/analog converter (hereinbelow, called “D/A converter”) 211, a latch circuit 212, and a shift register 213. The shift register 213 is connected to a not-shown external terminal via an interface circuit (I/F) 214 and a signal line “s”.
Next, the operation of the first prior art shown in FIG. 6 will be described. Image data input from the external terminal to the liquid crystal driver LSI 209 via the signal line “s” and the interface circuit 214 is written into the latch circuit 212 provided for each column via the shift register 213. The latch circuit 212 inputs the written image data to the D/A converter 211 on the row unit basis. An image signal voltage output from the D/A converter 211 is written into the signal line 202 provided for the glass substrate 206 via the buffer circuit 210. The shift register circuit 208 provided in the gate driver LSI 207 switches the pixel switch 204 to which the image signal voltage is to be written to the on state via the predetermined gate line 203. In such a manner, the predetermined image signal voltage is written into the liquid crystal element 205 of the pixel selected. After that, the liquid crystal element 205 displays optical characteristics according to the written image signal voltage, thereby displaying a predetermined image in the display area 200.
Such a prior art is used for a most common product at present in a general amorphous Si-TFT display and is disclosed in, for example, “Liquid Display Technique” written and compiled by Shoichi Matsumoto, Sangyo Tosho, 1996; pp. 68–70 (non-patent document 1).
To improve the first prior art, the following technique has been researched and developed in recent years. In the first prior art, the amorphous Si-TFT is provided on the glass substrate 206 and, in order to integrate circuit elements other than the pixel switch 204 on the same substrate, a peripheral LSI chip has to be mounted, so that the cost is high.
In contrast, in the following second prior art, a polycrystalline Si-TFT is provided on the glass substrate 206, so that not only the pixel switch 204 but also peripheral driving circuits which are conventionally integrated to the gate driver LSI 207 and the liquid crystal driver LSI 209 can be integrated on the same glass substrate 206.
FIG. 7 is a block diagram of an image display device of a second prior art. In the display area 200, the pixels 201 are provided in the shape of a matrix. To the pixel 201, the signal line 202 and the gate line 203 are connected. Although a number of pixels 201 are provided in the display area 200 in reality, for simplicity of the drawing, only one pixel is shown in FIG. 7. The pixel 201 is constructed by a pixel switch 204P formed by a polycrystalline Si-TFT and the liquid crystal element 205. The display area 200 is provided on the glass substrate 206. An end of the gate line 203 is connected to a shift register 208P commonly provided on the glass substrate 206. The shift register 208P is also formed by a polycrystalline Si-TFT. An end of the signal line 202 is connected to a buffer circuit 210P commonly provided on the glass substrate 206. The buffer circuit 210P is sequentially connected to a D/A converter 211P, a latch circuit 212P, and a shift register 213P. The shift register 213P is connected to a not-shown external terminal via the interface circuit 214 provided on the outside of the glass substrate 206 as a single crystal Si-LSI and the signal line “s”. Each of the buffer circuit 210P, D/A converter 211P, latch circuit 212P, and shift register circuit 213P is formed by a polycrystalline Si-TFT.
Next, the operation of the second prior art shown in FIG. 7 will be described. Image data input from the external terminal via the signal line “s” is input to the glass substrate 206 via the interface circuit 214 provided as a single crystal Si-LSI and written into the latch circuit 212P provided for each column via the shift register 213P. The latch circuit 212P inputs the written image data to the D/A converter 211P on the row unit basis. An image signal voltage which is output from the D/A converter 211 is written into the signal line 202 via the buffer circuit 210P. At this time, the shift register 208P switches the pixel switch 204P in a pixel row to which the image signal voltage is to be written to the on state via the predetermined gate line 203. In such a manner, the predetermined image signal voltage is written into the liquid crystal element 205 of the pixel selected. After that, the liquid crystal element 205 displays optical characteristics according to the written image signal voltage, thereby displaying a predetermined image in the display area 200.
The second prior art has advantages such that, as compared with the first prior art, the peripheral LSIs such as the gate driver LSI 207 and the liquid crystal driver LSI 209 can be reduced and the number of output terminals of the glass substrate 206 can be reduced. Consequently, the second prior art is being researched and developed vigorously in recent years. Such a prior art is specifically described in, for example, Japanese Unexamined Patent Publication No. 2002-328659 (Patent Document 1).
It can be said that the second prior art aims at reduction of the peripheral LSIs by forming the functions of the peripheral LSIs of a liquid crystal display on the same glass substrate 206 as that in the liquid crystal display by using polycrystalline Si-TFT.
Further, on an extension of the idea, the following third prior art is being studied recently. In the second prior art, the peripheral drive LSIs are integrated on the glass substrate 206. The third prior art aims at integration of even a peripheral system onto the same glass substrate 206 by using polycrystalline Si-TFTs.
FIG. 8 is a block diagram of an image display device of the third prior art. In the display area 200, the pixels 201 are provided in the shape of a matrix. To the pixels 201, the signal lines 202 and the gate lines 203 are connected. Although a number of pixels 201 are provided in the display area 200 in reality, for simplicity of the drawing, only one pixel is shown in FIG. 8. The pixel 201 is constructed by the pixel switch 204P formed by a polycrystalline Si-TFT and the liquid crystal element 205. The display area 200 is provided on the glass substrate 206. An end of the gate line 203 is connected to the shift register circuit 208P commonly provided on the glass substrate 206. The shift register circuit 208P is also formed by a polycrystalline Si-TFT. An end of the signal line 202 is connected to a driver circuit (DRV) 220 provided for the glass substrate 206. The driver circuit 220 includes the buffer circuit 210P, D/A converter 211P, latch circuit 212P, and shift register circuit 213P which are provided in the second prior art and corresponds to the liquid crystal driver LSI 209 in the first prior art. The driver circuit 220 is further connected to a frame memory (FMEM) 222 and a CPU 223 via a timing controller (T-CTL) 221. Moreover, a supply voltage-generating circuit 224 is formed on the glass substrate 206 by using a polycrystalline Si-TFT in a manner similar to the driver circuit 220, timing controller 221, frame memory 222, and CPU 223.
Next, the operation of the third prior art shown in FIG. 8 will be described. Image data which is read from the frame memory 222 under control of the CPU 223 is written into the driver circuit 220 via the timing controller 221. The driver circuit 220 converts the image data into an image signal voltage and writes the image signal voltage to the signal line 202 at a predetermined timing. At the same time, the timing controller 221 controls the shift register 208P. The shift register 208P switches the pixel switch 204P in a pixel row to which the image signal voltage is to be written to the on state via the predetermined gate line 203. In such a manner, the predetermined image signal voltage is written into the liquid crystal element 205 of the pixel 201 selected. After that, the liquid crystal element 205 displays optical characteristics according to the written image signal voltage, thereby displaying a predetermined image in the display area 200.
The third prior art has advantages such that, as compared with the second prior art, the peripheral mounting system such as the timing controller 221, frame memory 222, CPU 223, and supply voltage-generating circuit 224 can be also reduced, and is generally called a system-in display technique. Such a prior art is described in, for example, “Digest of Technical Papers, AM-LCD, '01, “System on Panel for Mobile Displays”, pp. 5–8) (Non-Patent Document 2).
In each of the foregoing prior arts, the advantages obtained by forming the polycrystalline Si-TFTs on the glass substrate are used for reducing the peripheral LSIs and the peripheral mounting system. Another technique of using the polycrystalline Si-TFT will be described as a fourth prior art. The fourth prior art is a technique used for, for example, a view finder of a digital still camera of a relatively small number of pixels and is directed to simplify the liquid crystal driver LSI in the first prior art.
FIG. 9 is a block diagram of an image display device of a fourth prior art. In the display area 200, the pixels 201 are provided in the shape of a matrix. To the pixels 201, the signal lines 202 and the gate lines 203 are connected. Although a number of pixels 201 are provided in the display area 200 in reality, for simplicity of the drawing, only one pixel is shown in FIG. 9. The pixel 201 is constructed by the pixel switch 204P formed by a polycrystalline Si-TFT and the liquid crystal element 205. The display area 200 is provided on the glass substrate 206. An end of the gate line 203 is connected to the shift register 208P commonly provided for the glass substrate 206. The shift register 208P is also formed by a polycrystalline Si-TFT. An end of the signal line 202 is connected to the shift register 213P formed by using a polycrystalline Si-TFT on the glass substrate 206. The shift register circuit 213P is connected to a not-shown external terminal via the buffer circuit 210, D/A converter 211, interface circuit 214, and signal line “s” which are formed by using single crystal Si on the outside of the glass substrate 206.
Next, the operation of the fourth prior art shown in FIG. 9 will be described. Image data input from the external terminal via the signal line “s” and the interface circuit 214 to the D/A converter 211 is converted to an image signal voltage and is input to the shift register 213P provided for the glass substrate 206 via the buffer circuit 210. The shift register 213P writes the image signal voltage to the signal line 202 provided for each column. At this time, the shift register 208P switches the pixel switch 204P in a pixel row to which the image signal voltage is to be written to the on state via the predetermined gate line 203. In such a manner, the predetermined image signal voltage is written into the liquid crystal element 205 of the pixel selected. The liquid crystal element 205 displays optical characteristics according to the written image signal voltage, thereby displaying a predetermined image in the display area 200.
Such a prior art is a technique different from the second prior art aiming at simplification of the liquid crystal driver LSI in the first prior art as described above and is used for, particularly, a display having a small number of pixels. The prior art is disclosed in, for example, Sanyo Semiconductor News of Sanyo Electric, No. N7635, “ALP249FXX-LCD module” (Non-Patent Document 3).